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AMD has its equivalent for the PCH, known simply as a chipset, no longer using the previous term Fusion controller hub since the release of the Zen architecture in 2017. As such, I/O functions are reassigned between this new central hub and the CPU compared to the previous architecture: some northbridge functions, the memory controller and PCIe lanes, were integrated into the CPU while the PCH took over the remaining functions in addition to the traditional roles of the southbridge. These include clocking (the system clock), Flexible Display Interface (FDI) and Direct Media Interface (DMI), although FDI is used only when the chipset is required to support a processor with integrated graphics. The PCH controls certain data paths and support functions used in conjunction with Intel CPUs. It is the successor to the Intel Hub Architecture, which used two chips - a northbridge and southbridge, and first appeared in the Intel 5 Series. The Platform Controller Hub ( PCH) is a family of Intel's single-chip chipsets, first introduced in 2009. This new release includes a microcode update from Intel for the following CPUs.An Intel DH82H81 PCH with its die exposed Intel recently announced that it has completed software validations and has started to release new microcode for current CPU platforms in reaction to the following threats:ĬVE-2019-11091 – Microarchitectural Data Sampling Uncacheable Memory (MDSUM)ĬVE-2018-12126 – Microarchitectural Store Buffer Data Sampling (MSBDS)?ĬVE-2018-12127 – Microarchitectural Load Port Data Sampling (MLPDS)ĬVE-2018-12130 – Microarchitectural Fill Buffer Data Sampling (MFBDS)